A Segment Rearrangement Approach to Channel Routing under the Crosstalk Constraints - Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
نویسندگان
چکیده
The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The upper bounds of allowable crosstalks, called crosstalk constraint, are usually given for each net in the design specification. This paper presents a segment rearrangement approach to channel routing to satisfy all the crosstalk constraints. Starting from the given routing, the proposed technique repeatedly rearranges the horizontal wire segments around the nets that violate the crosstalk constraints to reduce crosstalk. Our objective is to find a routing with the minimum number of tracks under crosstalk constraints. With experiments, we observed the presented technique is more effective than the track permutation technique.
منابع مشابه
COP: a Crosstalk OPtimizer for gridded channel routing
| The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The upper bounds of the allowable crosstalk for nets, called cross-talk constraints, are usually given in the design s...
متن کاملCOP: A Crosstalk OPtimizer for Gridded Channel Routing - Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
The interwire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The upper bounds of the allowable crosstalk for nets, called crosstalk constraints, are usually given in the design speci...
متن کاملSimulated Annealing Approach to Crosstalk Minimization in Gridded Channel Routing
The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to minimize crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. We present a simulated annealing approach based on segment rearrangement to crosstalk minimization in an initially gridd...
متن کاملDesign and analysis of segmented routing channels for row-based FPGA's
FPGAs combine the logic integration benefits of custom VLSI with the design, production, and time-to-market advantages of standard logic ICs. The Actel family of FPGAs exemplifies the rowbased FPGA model. Rows of logic cells interspersed with routing channels have given this family of FPGA devices the flavor of traditional channeled gate arrays or standard cells. However, unlike the conventiona...
متن کاملA timing model incorporating the effect of crosstalk on delay andits application to optimal channel routing
Crosstalk is generally recognized as a major problem in intergrated circuit design. This paper presents a novel approach to the efficient measurement of the effect of crosstalk on the delay of a net using an algorithm whose worst case complexity is polynomial-time in the number of nets. The cost of the algorithm is seen to be ( log ) in practice, where is the number of nets, and it is amenable ...
متن کامل